Virtual Design of an Audio Lifelogging System

Virtual Design of an Audio Lifelogging System

Tools for IoT Systems

Brian Mears, Mohit Shah
ISBN: 9781627054638 | PDF ISBN: 9781627056717
Copyright © 2016 | 73 Pages | Publication Date: July, 2016

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The availability of inexpensive, custom, highly integrated circuits is enabling some very powerful systems that bring together sensors, smart phones, wearables, cloud computing, and other technologies. This book advocates a top-down simulation method (virtual design) to design these types of complex systems so designers can identify problems early and begin software development prior to expensive chip and hardware development. It explains why simulation has become important for chip design and provides an introduction to some of the simulation methods used. The audio lifelogging research project demonstrates the virtual design process in practice. Anyone interested in developing digital devices for Internet of Things products should use this as both reference and guide in their work.

Table of Contents

Virtual Design
Audio Lifelogging
Authors' Biographies

About the Author(s)

Brian Mears, Intel Corporation (retired)
Brian Mears has a PhD from City University, London. He worked in the computer industry in the UK, at CERN in Geneva, at Bell Labs designing integrated circuits for audio compression, and at Intel Corporation for 29 years where he was a silicon architect and manager for embedded 32-bit microcontrollers, multi-core digital signal processors, and smartphone SoCs. His experience with complex SoC chip design led him to employ the modeling and simulation techniques found within.

Mohit Shah, Genesis Artificial Intelligence
Mohit Shah received his PhD from Arizona State University in 2015. He cofounded Genesis Artificial Intelligence, which specializes in advanced system and application design. His research interests lie in speech processing and analysis methods, covering both DSP and machine-learning related aspects. His prior work in industry included internships at Intel and Palo Alto Research Center (Xerox PARC).

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