New Prospects of Integrating Low Substrate Temperatures with Scaling-Sustained Device Architectural Innovation

New Prospects of Integrating Low Substrate Temperatures with Scaling-Sustained Device Architectural Innovation

Nabil Shovon Ashraf, Shawon Alam, Mohaiminul Alam
ISBN: 9781627058544 | PDF ISBN: 9781627058551
Copyright © 2016 | 80 Pages | Publication Date: February, 2016

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In order to sustain Moore's Law-based device scaling, principal attention has focused on toward device architectural innovations for improved device performance as per ITRS projections for technology nodes up to 10 nm. Efficient integration of lower substrate temperatures (<300K) to these innovatively configured device structures can enable the industry professionals to keep up with Moore's Law-based scaling curve conforming with ITRS projection of device performance outcome values. In this prospective review E-book, the authors have systematically reviewed the research results based on scaled device architectures, identified key bottlenecks to sustained scaling-based performance, and through original device simulation outcomes of conventional long channel MOSFET extracted the variation profile of threshold voltage as a function of substrate temperature which will be instrumental in reducing subthreshold leakage current in the temperature range 100K-300K. An exploitation methodology to regulate the die temperature to enable the efficient performance of a high-density VLSI circuit is also documented in order to make the lower substrate temperature operation of VLSI circuits and systems on chip process compatible

Table of Contents

Review of Research on Scaled Device Architectures and Importance of Lower Substrate Temperature Operation of n-MOSFETs
Review of Research on Scaled Device Architectures and Importance of Lower Substrate Temperature Operation of n-MOSFETs
Step-by-Step Computation of Threshold Voltage as a Function of Substrate Temperatures
Step-by-Step Computation of Threshold Voltage as a Function of Substrate Temperatures
Simulation Outcomes For Profile of Threshold Voltage As a Function of Substrate Temperature Based on Key Device-Centric Parameters
Simulation Outcomes For Profile of Threshold Voltage As a Function of Substrate Temperature Based on Key Device-Centric Parameters
Scaling Projection of Long Channel Threshold Voltage Variability with Substrate Temperatures to Scaled Node
Scaling Projection of Long Channel Threshold Voltage Variability with Substrate Temperatures to Scaled Node
Advantage of Lower Substrate Temperature MOSFET Operation to Minimize Short Channel Effects and Enhance Reliability
Advantage of Lower Substrate Temperature MOSFET Operation to Minimize Short Channel Effects and Enhance Reliability
A Prospective Outlook on Implementation Methodology of Regulating Substrate Temperatures on Silicon Die
A Prospective Outlook on Implementation Methodology of Regulating Substrate Temperatures on Silicon Die
Summary of Research Results
Conclusion
References
Authors' Biographies

About the Author(s)

Nabil Shovon Ashraf, North South University
Nabil Shovon Ashraf was born in Dhaka, Bangladesh, in 1974. He obtained his Bachelor's degree in Electrical Engineering (EE) from Indian Institute of Technology Kanpur, India, in 1997, Master's degree in EE from University of Central Florida, Orlando, Florida, in 1999, and Doctorate degree in EE from Arizona State University, Tempe, Arizona, in 2011. He was a post doctoral researcher in the department of electrical engineering of Arizona State University from 2011-2014. He was employed as design engineer in RF Monolithics Inc., a surface acoustic wave (SAW) based filter design company in Dallas, Texas, from 1999-2001. From 2003 till 2006 he served on the faculty of the department of Electrical & Electronic Engineering of Islamic University of Technology, Gazipur, Bangladesh, as Assistant Professor. In fall 2014, he became Assistant Professor in the department of Electrical and Computer Engineering (ECE) of North South University, Dhaka, Bangladesh. He has been listed in Marquis Who's Who in America in 2016 (70th platinum edition) and also in 2015 (69th edition). Dr. Ashraf has, to date, published six peer reviewed journal papers (two IEEE EDS society) and around 14 conference papers (three IEEE EDS society). He has also contributed to two book chapters on interface trap-induced reliability aspects (threshold voltage fluctuations) of nanoscale devices. He specializes in the area of device physics and modeling analysis of scaled devices for enabling improved device performance at the scaled node of current MOSFET device architectures.

Shawon Alam, North South University
Shawon Alam successfully completed his Bachelor's of Science in Electrical and Electronic Engineering from North South University in August 2015, and has performed research (2014–2015) concentrating on nanoscale nMOSFET device modeling on threshold voltage with the impact of temperature (100K-500K). Later, he joined an internship program at a multinational telecommunications company for a period of four months. He was involved with many extra-curricular and co-curricular activities like sports, social service, and a teaching assistantship during his graduate program. Presently, he is working as a network engineer in a renowned organization involved with international internet gateway (IIG) as well as internet service provider (ISP). In the future, he is willing to do further research on the MOSFET device.

Mohaiminul Alam, North South University
Mohaiminul Alam, a distinguished graduate with a Bachelor's of Science in Electrical and Electronic Engineering from North South University, has performed research (2014-2015) concentrating on CMOS device modeling, projecting the impact of temperature (100K–500K) on threshold voltage. Later, he joined an internship program at a telecommunications company. He is currently working as a project system and development engineer in an organization involved with the research and development program of solar products and solar solutions.

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